For microwave integrated circuits or millimeter wave integrated circuits, herein after called MMICs, transistor devices with sufficient gains at high frequencies are required. Two device configurations have been developed and used in two different MMIC technologies: high electron mobility transistor (HEMT) and hetero junction bipolar transistor (HBT). Both are based on compound semiconductors such as InGaAs, InGaN and GaN. MMICs based on HEMT or HBT are fabricated on wafers or substrates with epitaxial layers specifically designed for each technology. The present invention relates to fabrication of HEMT devices for MMICs applications and the following description will be focused on the HEMT processes and structures.
For HEMTs in MMICs applications, a maximum operating frequency, fmax is defined as the frequency when the gain of the device is reduced to 1. In general, the value of fmax is determined by gate length and charge carriers mobility in the channel layer, which could be InGaAs, InGaN or GaN. FIGS. 1A-1E show cross-sectional views of gate structures (100a, 100b, 100c, 100d and 100e) for HEMTs. Each of the structures is shown to have a gate stem portion (110S) and a head portion (110H) sitting on a semiconductor substrate (105), except for (110a) which has only one stem-like portion (110S′). For commonly adopted epitaxial layer structure with an InGaAs channel or GaN channel in HEMTs for X-band or Ka-band MMIC applications, the gate length, Ls (see FIG. 1A) required is 0.15 μm. For operation at higher frequencies, HEMTs with a gate length Ls of 0.1 μm or less are required.
For a simple rectangular gate structure (110a) shown in FIG. 1A which has a cross-sectional area of Ls×Hs with Hs as the height of the simple rectangular gate (110S′), the series resistance associated with the gate, Rs in the direction perpendicular to the cross-section (or along the width of the gate) is often too high so that the resulted RsC value is too large and will limit the operating frequency, where C is the capacitance associated with the gate or the capacitance between the gate (110S′) and the semiconductor substrate (105). Therefore, the maximum operating frequency fmax will be limited by this RsC constant rather than by the transit time of charge carriers across the semiconductor channel under the gate. Since a short gate length Ls is required to achieve high operation frequencies, fabrication of HEMTs with such a short gate length Ls is thus challenging due to the need to maintain a low enough unwanted series resistance Rs for the gate.
Several improved gate configurations have been developed and adopted, including: a T-gate structure (110b, see FIG. 1B) and a inverted L or Γ-gate structure (110c, FIG. 1C). There is also a Y-gate structure which is similar to the T-gate structure. All three gate structures have a gate stem portion (110S) and a gate head portion (110H) and all have one common feature: the length of the stem portion or the gate length, Ls, is fabricated to be small: either 0.25 μm, 0.15 μm or less for high frequency operation. It is thus clear that in subsequent description, the above three gate configurations: T-gate, Y-gate or Γ-gate will be commonly called a T-gate for simplification of the descriptions.
These T-gate structures can be divided into two portions: the gate stem portion (110S) which is similar to the simple gate (100S′) shown in FIG. 1A and the head portion (11011). The stem portion of the gate has a stem portion length, Ls and a stem portion height, Hs whereas the head portion of the gate has a head portion length, Lh and a head portion height Hh, so that the cross-sectional area of the head portion Lb×Hh is substantially greater than the cross-sectional area of the stem portion Ls×Hs. The total cross-sectional area of the T-gate is equal to Lh×Hh+Ls×Hs which is much greater than the cross-sectional area of the simple gate (110S′): Ls×Hs and thus leads to a much smaller unwanted series gate resistance. Although there will be an increase in the unwanted capacitance C due to the incorporation of the head portion of the gate, this capacitance increase rate is less than the decrease rate of the unwanted series gate resistance due to the head portion. As a result, the unwanted series resistance and capacitance product RsC associated with the T-gate structure is much smaller than that associated with the simple gate structure (110S′) shown in FIG. 1A, and a large maximum operation frequency fmax can be achieved.
The gate stem portion (100S) makes direct contact to the semiconductor substrate (105), which has a channel layer and a barrier layer to obtain low transit time and small junction capacitance C. In HEMT devices for low frequency applications such as power switching or amplification, the gate stem portion length (or the gate length) Ls may be larger than 0.25 μm.
In micro-lithography, the main parameters to achieve patterns or features with a given resolution, R, are light wavelength, and numerical aperture NA of the projection lens: R=k1[Δ/NA]. Here k1 is a process-related factor and is preferred to be as small as possible to achieve a high resolution. However, smaller k1 values will require very strict control of the processing parameters and is more difficult to achieve with high yield. Typical values of k1 are 0.3˜0.45. Currently, light sources for lithography include i-line UV source at 365 nm, KrF DUV laser at 248 nm and ArF DUV laser at 193 nm. The lithography processes may be divided into three categories: above-wavelength, R>λ, near wavelength R˜λ and sub-wavelength R<λ. Although the micro-lithography technologies have been developed extensively on silicon fabrication with sub-wavelength resolution, they are still insufficient for manufacturing compound semiconductor devices for MMICs. This is mainly because devices for the MMICs, specifically HEMTs require a T-gate structure to achieve high maximum operation frequency, fmax. The fabrication of a T-gate requires a polymeric photoresist mold which needs to meet strict structural and parameter requirements to obtain electrical performance and high yield. Current main production of MMICs involving HEMTs is achieved using an e-beam lithography process to form molds for the T-gates. However, production of wafers using e-beam lithography is less cost effective due to the low throughput compared to optical steppers or optical scanners.
Using an optical lithography to fabricate T-gates for HEMTs, two or three layers of photoresist may be used. As shown in FIGS. 1B and 1C, by using the conventional photolithography process, the transition from the gate stem portion (110S) to the gate head portion (110H) is usually abrupt and sharp (the sharp corners are indicated by AB in FIG. 1B and FIG. 1C). In order to enhance the mechanical strength, it is preferable to have a more smooth or gradual transition between the stem portion and the head portion in a gate. FIGS. 1D and 1E show schematic cross-sections of T-gates with a smooth and gradual transition, as indicated as SM in the figures, from the gate stem portion (100S) to the gate head portion (100H) to enhance the mechanical strength of the T-gate structures. Such smooth and gradual transition in the T-gate structures has been achieved by a thermal flow process for the first photoresist after the formation of the first cavity for forming the gate stem portion. However, the thermal flow process of photoresist to obtain the smooth or gradual transition between the gate stem portion and the gate head portion is difficult to control and even more difficult to achieve uniform yield in MMICs productions.
Therefore, it would be beneficial to have a improved process for forming T-gates for HEMTs in MMICs applications.